Peripherals

Peripherals, also known as Input-Output (I/O) devices, enable the computer to interact with the external environment and expand its functionality. Peripheral devices enhance a computer's capabilities by enabling it to accept input for storage or processing and to deliver processed data to a user, another computer, or a device controlled by the computer. Internal peripherals are connected directly to the computer's address, data, and control buses. External peripherals can be connected to the computer via USB or a similar connection.

The USB controller is also a peripheral device, so every external peripheral (e.g. mouse) is connected to the processor via an internal peripheral. In this chapter, we consider internal peripherals directly connected to the address, data, and control buses.

Types of peripherals

There is a variety of peripherals which can be connected to the computer. The most commonly used are:

  • parallel input/output ports,
  • serial communication ports,
  • timers/counters,
  • analogue to digital converters,
  • digital to analogue converters,
  • interrupt controllers,
  • DMA controllers,
  • displays,
  • keyboards,
  • sensors,
  • actuators.

Addressing of I/O devices

From the assembler programmer's perspective, the peripheral device is represented as a set of registers available in the I/O address space. Peripheral registers are used to control their behaviour, including mode of operation, parameters, configuration, transmission speed, etc. Registers are also data exchange points where the processor can store data to be transmitted to the user or an external computer, or read data from the user or another system.

The size of the I/O address space is usually smaller than the size of the program or data address space. The method of accessing peripherals depends on the processor's design. We can find two methods of I/O addressing: separate and memory-mapped I/O.

Separate I/O address space

A separate I/O address space is accessed independently of the program or data memory. In the processor, it is implemented with separate control bus lines for reading or writing I/O devices. Separate control lines usually mean that the processor also implements different instructions to access memory and I/O devices. It also means that the chosen peripheral and the byte in memory can have the same address, and only the instruction type distinguishes the final destination of the address. A separate I/O address space is shown schematically in figure 1. Reading data from memory is activated by the #MEMRD signal; the #MEMWR signal activates writing. If the processor needs to read or write the peripheral device's register, it uses #IORD or #IOWR, respectively.

The “#” symbol before a signal name means that the active signal on the line is a LOW state, while idle is a HIGH state.
Block diagram showing separate I/O addressing with processor connected to three address spaces: program memory (controlled by MEMRD/MEMWR signals), data memory (controlled by MEMRD/MEMWR signals), and I/O peripherals (controlled by IORD/IOWR signals), each with independent control signals.
Figure 1: Separate I/O Address Space

Memory-mapped I/O address space

In this approach, the processor doesn't implement separate control signals to access the peripherals. It uses a #RD signal to read the data from and a #WR signal to write the data to a common address space. It also doesn't have separate instructions for accessing registers in the I/O address space. Every such register is visible like any other memory location. It means the software is solely responsible for distinguishing I/O registers from memory data. Memory-mapped I/O address space is shown schematically in figure 2.

Block diagram showing memory-mapped I/O addressing where processor uses single RD and WR control signals to access a unified address space containing both program memory, data memory, and I/O peripherals. All devices share the same address, data, and control buses.
Figure 2: Memory-mapped I/O Address Space
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