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en:multiasm:cs:chapter_3_4 [2026/06/21 14:48] – pczekalskien:multiasm:cs:chapter_3_4 [2026/06/22 17:18] (current) – pczekalski
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 ======Components of Processor: Registers, ALU, Bus Control, Instruction Decoder ======  ======Components of Processor: Registers, ALU, Bus Control, Instruction Decoder ====== 
  
-From our perspective, the processor is the electronic integrated circuit that controls other elements of the computer. Its main ability is to execute instructions. While we will go into details of the instruction set, you will see that some instructions perform calculations or process data, while others do not. This suggests that the processor comprises two main units. One of them is responsible for instruction execution, while the second performs data processing. The first one is called the control unit or instruction processor. The second one is named the execution unit or data processor. We can see them in Fig {{ref>procblock}}.+From our perspective, the processor is the electronic integrated circuit that controls other elements of the computer. Its main ability is to execute instructions. While we will go into details of the instruction set, you will see that some instructions perform calculations or process data, while others do not. This suggests that the processor comprises two main units. One of them is responsible for instruction execution, while the second performs data processing. The first one is called the control unit or instruction processor. The second one is named the execution unit or data processor. We can see them in figure {{ref>procblock}}.
  
 <figure procblock> <figure procblock>
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   * Bus interface unit.   * Bus interface unit.
   * Interrupt controller.   * Interrupt controller.
-Elements of the control unit are shown in Fig {{ref>controlunit}}.+Elements of the control unit are shown in figure {{ref>controlunit}}.
  
 <figure controlunit> <figure controlunit>
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 In detail, the process looks as follows: In detail, the process looks as follows:
-  - The control unit takes the address of the instruction to be executed from a special register known as the Instruction Pointer or Program Counter and sends it to the memory via the address bus. It also generates signals on the control bus to synchronise memory with the processor.+  - The control unit takes the address of the instruction to be executed from a special register known as the Instruction Pointer or Program Counter. It sends it to the memory via the address bus. It also generates signals on the control bus to synchronise memory with the processor.
   - Memory takes the code of instruction from the provided address and sends it to the processor using a data bus.   - Memory takes the code of instruction from the provided address and sends it to the processor using a data bus.
   - The processor stores the instruction code in the instruction register and, based on the bit pattern, interprets what to do next.   - The processor stores the instruction code in the instruction register and, based on the bit pattern, interprets what to do next.
   - If the instruction requires the execution unit operation, the control unit generates signals to control it. In cooperation with the execution unit, it can also read from or write to memory.   - If the instruction requires the execution unit operation, the control unit generates signals to control it. In cooperation with the execution unit, it can also read from or write to memory.
  
-The control unit operates according to the clock signal generator's cycles, known as main clock cycles. With every clock cycle, some internal operations are performed. One such operation is reading or writing the memory, which sometimes requires more than a single clock cycle. Single memory access is known as a machine cycle. Because instruction execution sometimes requires multiple memory accesses and other actions, the execution of the whole instruction is called an instruction cycle. In summary, one instruction execution requires one instruction cycle and several machine cycles, each consisting of a few main clock cycles. Modern processors are designed to execute a single instruction (sometimes more than one) every clock cycle. This requires a more complex control unit design, multiple execution units, and other advanced techniques that enable processing more than one instruction at a time.+The control unit operates according to the clock signal generator's cycles, known as main clock cycles. In each clock cycle, certain internal operations are performed. One such operation is reading or writing the memory, which sometimes requires more than a single clock cycle. Single memory access is known as a machine cycle. Because instruction execution sometimes requires multiple memory accesses and other actions, the entire execution of an instruction is called an instruction cycle.\\ 
 +In summary, one instruction execution requires one instruction cycle and several machine cycles, each consisting of a few main clock cycles. Modern processors are designed to execute a single instruction (sometimes more than one) every clock cycle. This requires a more complex control-unit design, multiple execution units, and other advanced techniques that enable processing multiple instructions simultaneously.
  
 The control unit also accepts input signals from peripherals, enabling interrupts and direct memory access mechanisms. For proper return from the interrupt subroutine, the control unit uses a special register called the stack pointer. Interrupts and direct memory access mechanisms will be explained in detail in further chapters. The control unit also accepts input signals from peripherals, enabling interrupts and direct memory access mechanisms. For proper return from the interrupt subroutine, the control unit uses a special register called the stack pointer. Interrupts and direct memory access mechanisms will be explained in detail in further chapters.
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 The flags are used as conditions for decision-making instructions (like //if// statements in some high-level languages). The flags are used as conditions for decision-making instructions (like //if// statements in some high-level languages).
-The flags register can also store control flags to enable/disable processor functionality. An example of such a flag is the Interrupt Enable flag on the 8086 microprocessor.+The flags register can also store control flags to turn processor functionality on/off. An example of such a flag is the Interrupt Enable flag on the 8086 microprocessor.
  
 ===== Registers ===== ===== Registers =====
  
-Registers are memory elements that are placed very close to the arithmetic logic unit, both logically and physically. It makes them the fastest memory in the whole computer. They are sometimes called scratch registers, and the set of registers is called the register file. +Registers are memory elements located very close to the arithmetic logic unit, both logically and physically. It makes them the fastest memory in the whole computer. They are sometimes called scratch registers, and the set of registers is called the register file. 
  
-As we mentioned in the chapter on CISC and RISC processors, CISC processors have specialised registers, including the accumulator. A typical CISC execution unit is shown in Fig {{ref>CISCexeunit}}.+As we mentioned in the chapter on CISC and RISC processors, CISC processors have specialised registers, including the accumulator. A typical CISC execution unit is shown in figure {{ref>CISCexeunit}}.
  
 <figure CISCexeunit> <figure CISCexeunit>
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 </figure> </figure>
  
-A typical RISC execution unit does not have a specialised accumulator register. It implements the set of scratch registers as shown in Fig {{ref>RISCexeunit}}.+A typical RISC execution unit does not have a specialised accumulator register. It implements the set of scratch registers as shown in figure {{ref>RISCexeunit}}.
  
 <figure RISCexeunit> <figure RISCexeunit>
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