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| en:multiasm:piot:chapter_4_7 [2026/06/22 22:41] – [Basic instructions] pczekalski | en:multiasm:piot:chapter_4_7 [2026/06/22 22:50] (current) – [Basic instructions] pczekalski | ||
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| The following data transfer instructions are available: | The following data transfer instructions are available: | ||
| - | * **ldi** load immediate | + | * **ldi** load immediate, |
| - | * **mov** copy register | + | * **mov** copy register, |
| - | * **movw** copy register pair | + | * **movw** copy register pair. |
| The following logical instructions are available: | The following logical instructions are available: | ||
| - | * **and** logical AND | + | * **and** logical AND, |
| - | * **andi** logical AND with immediate | + | * **andi** logical AND with immediate, |
| - | * **or** logical OR | + | * **or** logical OR, |
| - | * **ori** logical OR with immediate | + | * **ori** logical OR with immediate, |
| - | * **eor** exclusive OR | + | * **eor** exclusive OR, |
| - | * **com** one's complement | + | * **com** one's complement, |
| - | * **neg** two's complement | + | * **neg** two's complement. |
| The following arithmetic instructions are available: | The following arithmetic instructions are available: | ||
| - | * **add** add without carry | + | * **add** add without carry, |
| - | * **adc** add with carry | + | * **adc** add with carry, |
| - | * **adiw** add immediate to word | + | * **adiw** add immediate to word, |
| - | * **sub** subtract without carry | + | * **sub** subtract without carry, |
| - | * **subi** subtract immediate | + | * **subi** subtract immediate, |
| - | * **sbc** subtract with carry | + | * **sbc** subtract with carry, |
| - | * **sbci** subtract immediate with carry | + | * **sbci** subtract immediate with carry, |
| - | * **sbiw** subtract immediate from word | + | * **sbiw** subtract immediate from word, |
| - | * **inc** increment | + | * **inc** increment, |
| - | * **dec** decrement | + | * **dec** decrement, |
| - | * **mul** multiply unsigned// | + | * **mul** multiply unsigned// |
| - | * **muls** multiply signed// | + | * **muls** multiply signed// |
| - | * **mulsu** multiply signed with unsigned// | + | * **mulsu** multiply signed with unsigned// |
| - | * **fmul** fractional multiply unsigned// | + | * **fmul** fractional multiply unsigned// |
| - | * **fmuls** fractional multiply signed// | + | * **fmuls** fractional multiply signed// |
| - | * **fmulsu** fractional multiply signed with unsigned// | + | * **fmulsu** fractional multiply signed with unsigned// |
| //(1) Not all processors support commands// | //(1) Not all processors support commands// | ||
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| The following bit shift instructions are available: | The following bit shift instructions are available: | ||
| - | * **lsl** logical shift left | + | * **lsl** logical shift left, |
| - | * **lsr** logical shift right | + | * **lsr** logical shift right, |
| - | * **rol** rotate left through carry | + | * **rol** rotate left through carry, |
| - | * **ror** rotate right through carry | + | * **ror** rotate right through carry, |
| - | * **asr** arithmetic shift right | + | * **asr** arithmetic shift right. |
| The following bit manipulation instructions are available: | The following bit manipulation instructions are available: | ||
| - | * **sbr** set bit(s) in register | + | * **sbr** set bit(s) in register, |
| - | * **cbr** clear bit(s) in register | + | * **cbr** clear bit(s) in register, |
| - | * **ser** set register | + | * **ser** set register, |
| - | * **clr** clear register | + | * **clr** clear register, |
| - | * **swap** swap nibbles | + | * **swap** swap nibbles. |
