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en:multiasm:piot:chapter_4_5 [2026/03/01 19:43] – [Addressing Modes] ktokarzen:multiasm:piot:chapter_4_5 [2026/04/01 14:21] (current) ktokarz
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 =====Program Memory Addressing with Post-increment===== =====Program Memory Addressing with Post-increment=====
-<todo @pczekalski>Continue figures formatting here</todo> 
 Program memory can be addressed with post-increment mode. In this mode, the Z pointer is automatically incremented after reading. Program memory can be addressed with post-increment mode. In this mode, the Z pointer is automatically incremented after reading.
 As shown in Fing {{ref>avr_addr_10}}, the Z-pointer contents specify a constant byte address. The 15 MSbs select the word address. The LSb selects the low byte if cleared (LSb == 0) or the high byte if set (LSb == 1).  As shown in Fing {{ref>avr_addr_10}}, the Z-pointer contents specify a constant byte address. The 15 MSbs select the word address. The LSb selects the low byte if cleared (LSb == 0) or the high byte if set (LSb == 1). 
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 As visible in Fig {{ref>avr_addr_11}}, for the **spm** instruction, the LSb must be 0, because **spm** works on whole words. The Z-pointer is incremented by 2 after the operation. The Z-pointer contents specify a constant byte address before incrementing. The 15 MSbs select the word address, and the LSb should be left cleared. As visible in Fig {{ref>avr_addr_11}}, for the **spm** instruction, the LSb must be 0, because **spm** works on whole words. The Z-pointer is incremented by 2 after the operation. The Z-pointer contents specify a constant byte address before incrementing. The 15 MSbs select the word address, and the LSb should be left cleared.
  
-<todo @mfojcik>Marcin, tu mam wątpliwości co do nazwy tego rozdziału - to addressing mode? KT odpowiadam - według dokmentacji AVR tak</todo> 
 <figure avr_addr_11> <figure avr_addr_11>
 {{ :en:multiasm:piot:ad11.png?600 |Store Program Memory}} {{ :en:multiasm:piot:ad11.png?600 |Store Program Memory}}
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 </figure> </figure>
  
-<todo @mfojcik> "immediate" -> "following immediately the instruction word"? KT - opisałem to dokładniej, Janek zmodyfikuje rysunek bo jest trochę nielogiczny</todo>+
  
 =====Indirect Program Memory Addressing===== =====Indirect Program Memory Addressing=====
en/multiasm/piot/chapter_4_5.1772386993.txt.gz · Last modified: by ktokarz
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