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Trace: • User's Guide • DMA • Instruction Execution Process

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en:multiasm:papc:chapter_6_7 [2026/02/11 13:24] – [String compare] ktokarzen:multiasm:papc:chapter_6_7 [2026/04/01 14:13] (current) – [Instruction Set of x64 - Essentials] ktokarz
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-====== Instruction Set of x86 - Essentials ======+====== Instruction Set of x64 - Essentials ====== 
 +The x64 processors can execute an extensive number of different instructions. As processors have evolved, the instruction set has expanded from the initial 117 in the 8086 processor to over 1000 in modern 64-bit designs. In this chapter, we present the instruction groups and a description of essential instructions called general-purpose instructions. 
 ===== Instruction groups ===== ===== Instruction groups =====
-The x64 processors can execute an extensive number of different instructions. In the documentation of processors, we can find several ways of dividing all instructions into groups. The most general division, according to AMD, defines five groups of instructions:+In the documentation of processors, we can find several ways of dividing all instructions into groups. The most general division, according to AMD, defines five groups of instructions:
   * General Purpose instructions   * General Purpose instructions
   * System instructions   * System instructions
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 In the **mov** instruction, the size of the source argument must be the same as the size of the destination argument. Arguments can be stored in registers, in memory addressed directly or indirectly. One of them can be constant (immediate). Only one memory argument is allowed. This comes from instructions encoding. In instructions, there is only one possible direct or indirect argument to be encoded. That's why most instructions, not only **mov**, can operate with one memory argument only. There are some exceptions, for example, string instructions, but such instructions use specific indirect addressing. In the **mov** instruction, the size of the source argument must be the same as the size of the destination argument. Arguments can be stored in registers, in memory addressed directly or indirectly. One of them can be constant (immediate). Only one memory argument is allowed. This comes from instructions encoding. In instructions, there is only one possible direct or indirect argument to be encoded. That's why most instructions, not only **mov**, can operate with one memory argument only. There are some exceptions, for example, string instructions, but such instructions use specific indirect addressing.
 <code asm> <code asm>
-mov al, 100        ;0xB0, 0x64         copy constant (immediate) of the value 100 (0x64) to al +mov al, 100        ;0xB0, 0x64 
-mov al, [bx]       ;0x67, 0x8A, 0x07   copy byte from the memory at address stored in bx to al (indirect addressing)+                   ;copy constant (immediate) of the value 100 (0x64) to al 
 +                    
 +mov al, [bx]       ;0x67, 0x8A, 0x07 
 +                   ;copy byte from the memory at address stored in bx to al  
 +                   ;(indirect addressing)
  
 ;Notice the difference between two following instructions ;Notice the difference between two following instructions
-mov eax, 100       ;0xB8, 0x64, 0x00, 0x00, 0x00   copy constant 100 to eax +mov eax, 100       ;0xB8, 0x64, 0x00, 0x00, 0x00 
-mov eax, [100]     ;0xA1, 0x64, 0x00, 0x00, 0x00   copy value from memory at address 100+                   ;copy constant 100 to eax 
 +                    
 +mov eax, [100]     ;0xA1, 0x64, 0x00, 0x00, 0x00    
 +                   ;copy value from memory at address 100
  
 ;It is possible to copy a constant to memory addressed directly or indirectly ;It is possible to copy a constant to memory addressed directly or indirectly
-;operand size specifier dword ptr is required to inform the processor about the size of the argument +;operand size specifier dword ptr is required  
-mov dword ptr ds:[200], 100   ;0xC7, 0x05, 0xC8, 0x00, 0x00, 0x00, 0x64, 0x00, 0x00, 0x00 +;to inform the processor about the size of the argument 
-                              ;copy value of 100, encoded as dword (four bytes), 0x64 = 100 +mov dword ptr ds:[200], 100    
-                              ;to memory at address 200, encoded as four bytes,  0xC8 = 200+                   ;0xC7, 0x05, 0xC8, 0x00, 0x00, 0x00, 0x64, 0x00, 0x00, 0x00 
 +                   ;copy value of 100, encoded as dword (four bytes), 0x64 = 100 
 +                   ;to memory at address 200, encoded as four bytes,  0xC8 = 200
                                                              
-mov dword ptr [ebx], 100      ;0xC7, 0x03, 0x64, 0x00, 0x00, 0x00 +mov dword ptr [ebx], 100 
-                              ;copy value of 100, encoded as dword (four bytes), 0x64 = 100 +                   ;0xC7, 0x03, 0x64, 0x00, 0x00, 0x00 
-                              ;to memory addressed by ebx +                   ;copy value of 100, encoded as dword (four bytes), 0x64 = 100 
 +                   ;to memory addressed by ebx 
 </code> </code>
 ==== Conditional move ==== ==== Conditional move ====
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