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| en:multiasm:paarm:chapter_5_5 [2026/02/27 16:17] – [Other addressing modes] jtokarz | en:multiasm:paarm:chapter_5_5 [2026/06/21 21:18] (current) – pczekalski | ||
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| ====Register addressing==== | ====Register addressing==== | ||
| - | The register is used to store the address of the data in the memory. Or the data will be stored in the memory at the address | + | The register is used to store the address of the data in the memory. Or the data will be stored in memory at the address |
| ''< | ''< | ||
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| ====Pre-indexed addressing with write back==== | ====Pre-indexed addressing with write back==== | ||
| - | The ARM separates | + | The ARM distinguishes |
| ''< | ''< | ||
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| ====Post-index with write back==== | ====Post-index with write back==== | ||
| - | Like with the previous addressing mode, this one is also separated. As the addressing mode says, ‘post’ means that the value of the register | + | Like with the previous addressing mode, this one is also separated. As the addressing mode indicates, ‘post’ means the register |
| ''< | ''< | ||
| ====Other addressing modes==== | ====Other addressing modes==== | ||
| - | There are some other addressing modes available. Some addressing modes are used only for function or procedure calls, while others combine previously described addressing modes. This subsection | + | There are some other addressing modes available. Some addressing modes are used only for function or procedure calls, while others combine previously described addressing modes. This subsection |
| * Register to register, also called register direct addressing mode. It is used to copy data from one register to another. No memory access is performed with such operations. | * Register to register, also called register direct addressing mode. It is used to copy data from one register to another. No memory access is performed with such operations. | ||
| * Literal addressing, alternatively, | * Literal addressing, alternatively, | ||
| * PC-relative addressing | * PC-relative addressing | ||
| - | Literal addressing mode allows | + | Literal addressing mode allows literal addresses in the program code. Something similar is done with function names, but in this situation, the data are addressed by literal names. PC-relative addressing |
| Some instructions allow loading (and storing) a pair of data (LDP and STP instructions). | Some instructions allow loading (and storing) a pair of data (LDP and STP instructions). | ||
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| </ | </ | ||
| - | The data are loaded from memory, and the sign bit is preserved only for a 32-bit wide value when the destination register is addressed as a 32-bit register. If the 64-bit register is used as the destination, | + | The data are loaded from memory, and the sign bit is preserved only for a 32-bit wide value when the destination register is addressed as a 32-bit register. If the 64-bit register is used as the destination, |
| <figure ldrsbw0> | <figure ldrsbw0> | ||
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| ** Unprivileged addressing mode** | ** Unprivileged addressing mode** | ||
| - | The unprivileged addressing mode simulates EL0 memory access even when the CPU is running at EL1 exception level. | + | The unprivileged addressing mode simulates EL0 memory access even when the CPU is running at EL1 exception level. |
| ''< | ''< | ||
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| ''< | ''< | ||
| - | These two instruction examples load/store a 32-bit word from/to memory at address X1, but the data access is performed | + | These two instruction examples load/store a 32-bit word to/from memory at address X1, but the data access is performed |
| ** Atomic/ | ** Atomic/ | ||
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| </ | </ | ||
| - | Atomic | + | The atomic |
