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| en:multiasm:cs:chapter_3_3 [2026/06/21 14:47] – pczekalski | en:multiasm:cs:chapter_3_3 [2026/06/23 00:31] (current) – pczekalski | ||
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| Complex instructions mean that a typical single CISC processor instruction performs more operations during its execution than a typical RISC instruction. The CISC processors also implement more sophisticated addressing modes. This means that if we want to implement an algorithm, we can use fewer CISC instructions than RISC instructions. Of course, it comes at the cost of a more sophisticated CISC processor design than a RISC one. The complexity of a circuit influences the average execution time of a single instruction. As a result, the CISC processor performs more work during program execution, whereas with RISC, the compiler (or assembler programmer) performs more work during the implementation phase. | Complex instructions mean that a typical single CISC processor instruction performs more operations during its execution than a typical RISC instruction. The CISC processors also implement more sophisticated addressing modes. This means that if we want to implement an algorithm, we can use fewer CISC instructions than RISC instructions. Of course, it comes at the cost of a more sophisticated CISC processor design than a RISC one. The complexity of a circuit influences the average execution time of a single instruction. As a result, the CISC processor performs more work during program execution, whereas with RISC, the compiler (or assembler programmer) performs more work during the implementation phase. | ||
| - | The most visible distinguishing features between RISC and CISC architectures to a programmer lie in the general-purpose registers and instruction operands. Typically, in CISC, the number of registers is smaller than in RISC. Additionally, | + | The most visible distinguishing features between RISC and CISC architectures to a programmer lie in the general-purpose registers and instruction operands. Typically, in CISC, the number of registers is smaller than in RISC. Additionally, |
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| operation arg1, arg2 ; Example: arg1 = arg1 + arg2 | operation arg1, arg2 ; Example: arg1 = arg1 + arg2 | ||
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| <table ciscrisc> | <table ciscrisc> | ||
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| ^ Feature | ^ Feature | ||
| | Instructions | | Instructions | ||