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| en:multiasm:cs:chapter_3_1 [2026/02/24 10:20] – [Overall View on Computer Architecture: Processor, Memory, IO, Buses] ktokarz | en:multiasm:cs:chapter_3_1 [2026/03/01 14:00] (current) – [Buses] ktokarz | ||
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| ===== Processor ===== | ===== Processor ===== | ||
| - | It is often called “the brain” of the computer. Although it doesn’t think, the processor is the element which controls all other units of the computer. The processor is the device that manages everything in the machine. Every hardware component of the computer is controlled, to some extent, by the main processor. Even if the device has its own processor - for example, a keyboard - it works under the control of the main one. The processor handles events. We can say that synchronous events are those that the processor handles periodically. The processor can’t stop. Of course, when it has the power, even when you don’t see anything special happening on the screen. On a PC with an operating system without a graphical user interface, for example, plain Linux, or in a command box in Windows, if you see only „C: | + | It is often called “the brain” of the computer. Although it doesn’t think, the processor is the element which controls all other units of the computer. The processor is the device that manages everything in the machine. Every hardware component of the computer is controlled, to some extent, by the main processor. Even if the device has its own processor - for example, a keyboard - it works under the control of the main one. The processor handles events, which can be synchronous or asynchronous. We can say that synchronous events are those that the processor handles periodically. The processor can’t stop. Of course, when it has the power. Even when you don’t see anything special happening on the screen. On a PC with an operating system without a graphical user interface, for example, plain Linux, or in a command box in Windows, if you see only „C: |
| A processor is characterised by its main parameters, including its operating frequency and class. | A processor is characterised by its main parameters, including its operating frequency and class. | ||
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| <note info> The byte is historically assumed to be 8 bits of information and used as the base unit to express the size of data in the world of computers. </ | <note info> The byte is historically assumed to be 8 bits of information and used as the base unit to express the size of data in the world of computers. </ | ||
| The size of the memory installed on the computer does not have to match the size of the address space, the maximum size of memory which is addressable by the processor. In modern machines, it would be impossible or hardly achievable. For example, for x64 architecture, | The size of the memory installed on the computer does not have to match the size of the address space, the maximum size of memory which is addressable by the processor. In modern machines, it would be impossible or hardly achievable. For example, for x64 architecture, | ||
| - | <note info> To learn more about paging please refer to https:// | + | <note info>To learn more about paging, please refer to the website |
| + | https:// | ||
| ===== Peripherals ===== | ===== Peripherals ===== | ||
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| **Control bus** is formed by lines mainly used for synchronisation between the elements of the computer. The minimal implementation includes the read and write lines. Read line (#RD) is the information that other elements use to indicate that the processor wants to read data from the unit. In such a situation, the element, e.g. memory, puts the data from the addressed cell on the data bus. Active write signal (#WR) informs the element that the data which is present on the data bus should be stored at the specified address. | **Control bus** is formed by lines mainly used for synchronisation between the elements of the computer. The minimal implementation includes the read and write lines. Read line (#RD) is the information that other elements use to indicate that the processor wants to read data from the unit. In such a situation, the element, e.g. memory, puts the data from the addressed cell on the data bus. Active write signal (#WR) informs the element that the data which is present on the data bus should be stored at the specified address. | ||
| The control bus can also include other signals specific to the system, e.g., interrupt signals, DMA control lines, clock pulses, signals distinguishing memory and peripheral access, signals activating selected modules, and others. | The control bus can also include other signals specific to the system, e.g., interrupt signals, DMA control lines, clock pulses, signals distinguishing memory and peripheral access, signals activating selected modules, and others. | ||
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| + | <note info> | ||
| + | The "#" | ||
| + | </ | ||