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--- en:multiasm:cs:chapter_3_11 [2026/06/23 11:50] – [Floating point] ktokarz
+++ en:multiasm:cs:chapter_3_11 [2026/06/23 11:52] (current) – [Endianness] ktokarz
@@ Line 58: / Line 58: @@
 ===== Endianness =====
 Data encoded in memory must be compatible with the processor. Memory chips are usually organised as a sequence of bytes, which means that every byte can be individually addressed. For processors with a class higher than 8-bit, there appears to be an issue with byte order in larger data types. There are two possibilities:
-  - Little Endian - low-order byte is stored at a lower address in the memory.
+  - Little endian - low-order byte is stored at a lower address in the memory.
-  - Big Endian - the high-order byte is stored at a lower address in the memory.
+  - Big endian - the high-order byte is stored at a lower address in the memory.
 These two methods for a 32-bit class processor are shown in Fig{{ref>littlebigendian}}

en/multiasm/cs/chapter_3_11.txt · Last modified: 2026/06/23 11:52 by ktokarz