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en:multiasm:piot:chapter_4_3 [2026/01/19 14:59] – marcinen:multiasm:piot:chapter_4_3 [2026/03/01 17:43] (current) – ktokarz
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 ====== Registers ====== ====== Registers ======
  
-Registers are a key element of AVR microcontrollers. There are various types of registers, including general-purpose, special-purpose, and status registers. General-purpose registers are used to store temporary data. Special registers control microcontroller functions, such as timers or ADC. Status registers store information about the processor state, such as carry or zero flags. Each register has a specific function and is accessible through particular assembler instructions. Registers allow quick access to data and control over the processor.+Registers are a key element of AVR microcontrollers. There are various types of registers, including general-purpose, special-purpose, and status registers. General-purpose registers are used to store temporary data. Special registers control microcontroller functions, such as timers or ADC. Status registers store information about the processor state, such as carry or zero flags. Each register has a specific function and is accessible through particular assembler instructions. Registers allow quick access to data and control over the processor. 
  
-AVR CPU General Purpose Working Registers (R0-R31)+==== General-purpose registers ==== 
 + 
 +In the AVR architecture, there are 32 general-purpose registers belonging to two groups:
  
 **R0-R15:**  **R0-R15:** 
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 **R16-R31:**  **R16-R31:** 
-General-purpose registers that can be used with immediate+General-purpose registers that can be used with immediate instructions
  
-Comparison Table: AVR Registers R0–R15 vs. R16–R31+Table {{ref>avr_register_comparison}} presents a summary of AVR CPU General Purpose Working Registers (R0-R31) with their features.
  
-^ Feature                    ^ R0–R15                                                 ^ R16–R31                                                    ^ +<table avr_register_comparison> 
-| Instruction compatibility  | Cannot be used with immediate instructions (LDI, CPI, ORI, ANDI) | Fully compatible with immediate instructions | +<caption>Comparison Table: AVR Registers R0–R15 vs. R16–R31</caption> 
-| Opcode encoding            | Not encodable in 4‑bit register fields                     | Encodable in all immediate‑type formats      | + 
-| Typical compiler usage     | Less preferred; used for temporary or special roles        | Preferred for arithmetic and logic operations | + 
-| Special-purpose roles      | R0: scratch<br>R1: constant zero                           | R26–R31 used as X/Y/Z pointer registers      | +^  Feature                     ^  R0–R15                                                            ^  R16–R31                                        ^ 
-| Pointer support            | No                                                         | Yes: X, Y, Z pointers                        | +|  Instruction compatibility   |  Cannot be used with immediate instructions (LDI, CPI, ORI, ANDI)  |  Fully compatible with immediate instructions   | 
-| Efficiency                 | Less efficient for immediate operations                    | More efficient due to shorter opcodes        | +|  Opcode encoding             |  Not encodable in 4‑bit register fields                            |  Encodable in all immediate‑type formats        | 
-| Multiplication involvement | R0/R1 used implicitly for results                          | Not used by multipliers                      | +|  Typical compiler usage      |  Less preferred; used for temporary or special roles               |  Preferred for arithmetic and logic operations  | 
-| Suitability in ASM         | Limited; avoid with immediates; R0/R1 have special rules   | Recommended for general ALU operations        | +|  Special-purpose roles       |  R0: scratch\\ R1: constant zero                                   |  R26–R31 used as X/Y/Z pointer registers        | 
-| GCC policy                 | R1 must remain 0; R0 is volatile                           | Treated as normal general-purpose registers  |+|  Pointer support             |  No                                                                |  Yes: X, Y, Z pointers                          | 
 +|  Efficiency                  |  Less efficient for immediate operations                           |  More efficient due to shorter opcodes          | 
 +|  Multiplication involvement  |  R0/R1 used implicitly for results                                 |  Not used by multipliers                        | 
 +|  Suitability in ASM          |  Limited; avoid with immediates; R0/R1 have special rules          |  Recommended for general ALU operations         | 
 +|  GCC policy                  |  R1 must remain 0; R0 is volatile                                  |  Treated as normal general-purpose registers    | 
 +</table>
  
 <figure avr_registers> <figure avr_registers>
-{{en:multiasm:piot:avr_register1.svg?800|AVR Registers}}+{{ en:multiasm:piot:avr_register1.png?600 |AVR Registers}}
 <caption>AVR Registers</caption> <caption>AVR Registers</caption>
 </figure> </figure>
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 R26-R31: These registers serve as 16-bit address pointers for indirect addressing of the data space. They are defined as X, Y, and Z registers. R26-R31: These registers serve as 16-bit address pointers for indirect addressing of the data space. They are defined as X, Y, and Z registers.
    
-<figure avr_registers> +<figure extended_registers> 
-{{en:multiasm:piot:x_y_z_registers.svg?800|Extended registers}} +{{ en:multiasm:piot:x_y_z_registers.png?600 |Extended registers}} 
-<caption>Etended Registers</caption>+<caption>Extended Registers</caption>
 </figure> </figure>
-**Other registers:**+==== Other registers ====
  
-RAMPX, RAMPY, RAMPZ: Registers concatenated with the X-, Y-, and Z-registers, enabling indirect addressing of the entire data space on MCUs with more than 64 KB of data space, and constant data fetch on MCUs with more than 64 KB of program space.+**RAMPX, RAMPY, RAMPZ:** Registers concatenated with the X-, Y-, and Z-registers, enabling indirect addressing of the entire data space on MCUs with more than 64 KB of data space, and constant data fetch on MCUs with more than 64 KB of program space.
  
-RAMPD: Register concatenated with the Z-register, enabling direct addressing of the whole data space on MCUs with more than 64 KB data space.+**RAMPD:** Register concatenated with the Z-register, enabling direct addressing of the whole data space on MCUs with more than 64 KB data space.
  
-EIND: Register concatenated with the Z-register, enabling indirect jump and call to the entire program space on MCUs with more than 64K words (128 KB) of program space.+**EIND:** Register concatenated with the Z-register, enabling indirect jump and call to the entire program space on MCUs with more than 64K words (128 KB) of program space.
  
 <table Register properties> <table Register properties>
en/multiasm/piot/chapter_4_3.1768827574.txt.gz · Last modified: by marcin
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