Differences

This shows you the differences between two versions of the page.

--- en:multiasm:papc:chapter_6_7 [2025/10/23 12:10] – [Bit and Byte Instructions] ktokarz
+++ en:multiasm:papc:chapter_6_7 [2026/01/22 12:11] (current) – [Sign extension] ktokarz
@@ Line 159: / Line 159: @@
   * **cwde** - converts word in ax to doubleword extended in eax
   * **cdq** - converts doubleword in eax to quadword in edx:eax
+  * **cdqe** - convert doubleword in eax to quadword in rax
+  * **cqo** - convert quadword in rax to double quadword in rdx:rax
-Sign extension instructions work solely with the accumulator. Fortunately, there are also more universal instructions which copy and extex data at the same time.
+Sign extension instructions work solely with the accumulator. Fortunately, there are also more universal instructions which copy and extend data at the same time.
   * **movsx** - copies and sign-extends a byte to a word or doubleword or word to doubleword.
   * **movzx** - copies and zero-extends a byte to a word or doubleword or word to doubleword.
@@ Line 285: / Line 287: @@
 The **popcnt** instruction counts the number of bits equal to "1" in a data. The applications af this instruction include genome mining, handwriting recognition, digital health workloads, and fast hamming distance counts((https://patents.google.com/patent/US8214414)).
+The **crc32** instruction implements the calculation of the cyclic redundancy check in hardware. The polynomial of the value 11EDC6F41h is fixed.
 ===== Control transfer instructions =====
@@ Line 535: / Line 539: @@
 The **lzcnt** instruction counts the number of zeros in an argument starting from the most significant bit. The **tzcnt** counts zeros starting from the least significant bit. For an argument that is not zero, **lzcnt** returns the number of zeros before the first 1 from the left, and **tzcnt** gives the number of zeros before the first 1 from the right.
-The **bextr** instruction copies the number of bits from source to destination arguments starting at the chosen position. The third argument specifies the number of bits and the starting bit position. Bits 7:0 of the third operand specify the starting bit position, while bits 15:8 specify the maximum number of bits to extract.
+The **bextr** instruction copies the number of bits from source to destination arguments starting at the chosen position. The third argument specifies the number of bits and the starting bit position. Bits 7:0 of the third operand specify the starting bit position, while bits 15:8 specify the maximum number of bits to extract, as shown in figure {{ref>bextr_instr}}.
-BEXTR Contiguous bitwise extract.
+<figure bextr_instr>
-BLSI Extract lowest set bit.
+{{ :en:multiasm:cs:bextr.png?400 |Illustration of bit extraction instruction}}
-BLSMSK Set all lower bits below first set bit to 1.
+<caption>Illustration of bit extraction instruction</caption>
-BLSR Reset lowest set bit.
+</figure>
-BZHI Zero high bits starting from specified bit position.
-PDEP Parallel deposit of bits using a mask.
+The **blsi** instruction extracts the single, lowest bit set to one, as shown in figure {{ref>blsi_instr}}.
-PEXT Parallel extraction of bits using a mask.
+<figure blsi_instr>
+{{ :en:multiasm:cs:blsi.png?400 |Illustration of the lowest set bit extraction instruction}}
+<caption>Illustration of lowest set bit extraction instruction</caption>
+</figure>
+The **blsmsk** instruction sets all lower bits below a first bit set to 1. It is shown in figure {{ref>blsmsk_instr}}.
+<figure blsmsk_instr>
+{{ :en:multiasm:cs:blsmsk.png?400 |Illustration of the instruction which sets all lower bits below a first bit set to 1.}}
+<caption>Illustration of the instruction which sets all lower bits below a first bit set to 1</caption>
+</figure>
+The **blsr** instruction resets (clears the bit to zero value) the lowest set bit. It is shown in figure {{ref>blsr_instr}}.
+<figure blsr_instr>
+{{ :en:multiasm:cs:blsr.png?400 |Illustration of the instruction which resets a first bit set to 1.}}
+<caption>Illustration of the instruction which resets a first bit set to 1</caption>
+</figure>
+The **bzhi** instruction resets high bits starting from the specified bit position, as shown in figure {{ref>bzhi_instr}}.
+<figure bzhi_instr>
+{{ :en:multiasm:cs:bzhi.png?400 |Illustration of the instruction which resets high bits starting from the specified bit position.}}
+<caption>Illustration of the instruction which resets high bits starting from the specified bit position</caption>
+</figure>
+The **pdep** instruction performs a parallel deposit of bits using a mask. Its behaviour is shown in figure {{ref>pdep_instr}}.
+<figure pdep_instr>
+{{ :en:multiasm:cs:pdep.png?600 |Illustration of the parallel deposit instruction}}
+<caption>Illustration of the parallel deposit instruction</caption>
+</figure>
+The **pext** instruction performs a parallel extraction of bits using a mask. Its behaviour is shown in figure {{ref>pext_instr}}.
+<figure pext_instr>
+{{ :en:multiasm:cs:pext.png?600 |Illustration of the parallel extraction instruction}}
+<caption>Illustration of the parallel extraction instruction</caption>
+</figure>